Ethernet Network Interfaces

IEEE-802.3 10BASE5 Network Interface
Introduction

10BASE5 Ethernet subsystems based on the Institute of Electrical and Electronic Engineers' (IEEE) 802.3 specifications that utilize 0.4 inch double shielded coaxial cable as the network transmission line are being replaced by lower cost unshielded Ethernet twisted pair (UETP) and higher bandwidth fiber optic systems. However, many computer vendors still support this 10 Mbit/second bandwidth system since hosts equipped with the specified interface may be easily adapted to any of the other 802.3 networks through the use of an inexpensive external converter that obtains both signal and power from the 10BASE5 external AUI (Attachment Unit Interface) connector.

Component Placement

The 10BASE5 data transceiver provides large bandwidth, fast risetime current source outputs rich in harmonic energy beyond 200 MHz. To minimize potential radiated EMI coupling and to comply with stringent signal integrity requirements, all interface components (transceiver, associated decoupling capacitors, isolation transformer, and common mode filter) must be closely spaced and located directly adjacent to the external interface connector.

Design Considerations
General Description of Signals

The 10BASE5 Ethernet interface connector passes three pairs of transformer isolated differential signals for signal transmission, reception, and collision detection. Loading and isolation specifications prohibit the use of shunt capacitive filtering to logic or chassis "grounds." The interface also supplies 12 volts DC to enable the use of externally powered media access units (MAUs). This power connection must be filtered to suppress EMI that might otherwise be conducted out the power conductors into the externally connected MAU and produce radiated EMI failures from the MAU and its associated cables. Conversely, though less frequent, external MAUs or signal converters may inject EMI into the host through this power connection of it is left unfiltered.

Signal Layout Requirements
Routing of Differential Signals

The differential signals TX+/-, RX+/-, and COL+/- at the Serial Interface Adapter (SIA) chip may have risetimes approaching 2 nanoseconds and must be routed with special care to minimize common mode noise that may be coupled into the differential signal pair or out of the pair into other nearby host interface circuits. PCB traces for these signals must be short (two inches or less is achievable in practice) and occupy the minimum area possible. If routed on a single PCB signal layer, these signal pairs should be tightly coupled through the use of closely spaced traces.

Separation of Digital & Analog Power & Ground Areas

As shown in Figure 46, the 10BASE5 interface circuitry is contained in two physically separated signal regions that encompass:

1)a digital signal area that includes all transceiver signals and the primaries of the isolation transformer

2)an output signal area that includes all signals between the isolation transformer secondary and the AUI connector.

To achieve additional noise isolation between the digital and output signal regions, many 10BASE5 interface designs incorporate separate power and ground regions. While often effective, this design technique may produce multilayer circuit designs where signal traces cross over gaps in ground planes. Such gaps interrupt high frequency signal return paths, producing high inductance paths with accompanying radiated EMI and signal integrity problems. If split digital and output regions are used, the final design must be carefully inspected to ensure that all signals have an adjacent uninterrupted return ("ground") plane or trace.

Common Mode EMI Filtering

Many of the commercially available Ethernet isolation transformers exhibit substantial coupling capacitance between their primary and secondary windings, as shown in Figure 45. Since this capacitance provides a path for high frequency common mode current, the choice of isolation transformer will greatly affect the amount of common mode EMI that may appear on the external 10BASE5 transceiver cable. To provide common mode EMI rejection, a common mode EMI filter should be inserted between the isolation transformer and output connector, as shown in Figure 46.

Power Distribution
Routing of +12 Volts

The 10BASE5 interface connector provides a dedicated +12 volts for the operation of an external data transceiver/converter. In most implementations, the host +12 volt conductor will share a "ground" return with other system required supply voltages (+5, -12, etc.). To prevent the coupling of EMI between the Ethernet subsystem and other host circuits, the +12 V PCB trace (or plane) must be short, filtered, and tightly coupled (directly adjacent to) its return ("ground") plane or trace.

Local Decoupling & The Use of Steward Ferrites for EMI Control

The +12 volt supply voltage and "ground" (return) conductor must be properly decoupled and filtered to prevent the transmission of EMI between internal host circuitry and externally connected network hardware. A Steward filter part number 28F0248-6T0 or 2-line version of 29F0303 or 29F0428 should be inserted in series with the +12 V and +12 V ground conductors and placed adjacent to the AUI connector. To attenuate common and differential mode noise, 1.0 uF and 0.001 capacitors should also be used in the same area.

Avoiding Low Frequency (30-50 MHz) Common Mode Loops Between Systems

To eliminate common mode noise on external wires, EMI design guidelines often recommend that the signal return or "ground" conductors of external cables be connected to the system chassis. However, if an external peripheral device without such a chassis connection is attached to a properly designed host, a large low frequency common mode current may flow, leading to a radiated EMI failure. This situation can be remedied by removing the signal return - chassis connection and substituting a small value capacitor, as shown in Figure 47. This capacitor prevents the flow of low frequency common mode current while still providing a low impedance chassis connection at higher frequencies. This design technique is applied at pin 6 of the 10BASE5 AUI connector in Figure 46.

IEEE-802.3 10BASE2 "Cheapernet" Network Interface
Introduction

The 10BASE2 "Cheapernet" network subsystem was developed as a lower cost alternative to the 10BASE5. Cheapernet uses inexpensive RG58/U cable and connectors for the network transmission line and internal Media Access Units (MAU) instead of the external MAU required in 10BASE5 interconnects. 10BASE2 bandwidth is identical to that of 10BASE5 at 10Mbits/second. Electrical safety isolation is implemented at two locations: 1) at the Cheapernet interface power supply, and 2) at the Cheapernet data isolation transformer. Whereas the external 10BASE5 transceiver cable shield may be connected directly to the host chassis, the Cheapernet external coaxial cable shield cannot, except at a single location on a network branch, as shown in Figure 49. This restriction prevents large fault currents from appearing on the network cable shield in the event of lightning of facility ground fault conditions.

Design Considerations
General Description of Critical Signals

The 10BASE2 Cheapernet interface connector attaches to a doubly terminated 50 ohm coaxial transmission line for network signal transmission, reception, and collision detection. Fifty ohm terminations are placed at each end of each unique network branch. The shield of the coaxial line is DC isolated from all station chassis except one. Signal rise and fall times on the network transmission line are specified to be 25 +5/0 nanoseconds.

Cheapernet interface circuitry requires a source of -9 volts that is DC isolated from the host safety ground (chassis). High frequency filtering of this supply voltage is required to prevent the transfer of EMI between the high frequency interface circuits and the host power supply. Since Ethernet subsystems employ fast risetime 10 MHz based timing signals, they may produce conducted EMI on host AC power cords at 10, 20 and 30 MHz, as well as radiated EMI at 30 MHz and above.

Component Placement

The Serial Interface Adapter (SIA) and Cheapernet transceiver chips provide large bandwidth, fast risetime current source outputs rich in harmonic energy beyond 200 MHz. To minimize potential radiated EMI coupling and to meet stringent signal integrity requirements, all network interface components (SIA, isolation transformer, transceiver) must be closely spaced and located directly adjacent to the network BNC connector.

Signal Layout Requirements
Routing of Differential Signals

The differential signals TX+/-, RX+/- and COL+/- that appear between the Serial Interface Adapter (SIA) chip, pulse transformer, and the transceiver exhibit risetimes approaching two nanoseconds. They must be routed with special care to minimize common mode noise that may be coupled into the differential signal pair or out of the pair into other nearby host interface circuits. PCB traces for these signals must be short (two inches or less is achievable in practice) and occupy the minimum area possible. If routed on a single PCB signal layer, these signal pairs should be tightly coupled through the use of closely spaced traces.

Separation of Digital & Analog Power & Ground Areas

As shown in Figure 51, the 10BASE2 interface circuitry is contained in two physically separated signal regions that encompass:

1)a digital signal area that includes all transceiver signals and the primaries of the isolation transformer

2)an "I/O" (input/output) signal area that includes all the signals that appear among the secondaries of the isolation transformer/filter, the common mode filter, and the external interface connector.

To achieve additional noise isolation between the digital and I/O signal regions, many 10BASE2 interface designs incorporate physically separate PC board power and ground planes for the digital and I/O signal areas. While often effective, this design technique may produce multilayer circuit designs in which signal traces cross over gaps in ground planes. Such gaps interrupt high frequency signal return paths, producing high inductance paths with accompanying radiated EMI and signal integrity problems. If split digital and analog regions are used, the final design must be carefully inspected to ensure that all signals are adjacent to a nearby uninterrupted return ("ground") plane or trace.

EMI Filtering Using Steward Ferrite Beads

Cheapernet interfaces often fail radiated EMI tests due to the presence of common mode noise currents on the shield of the external RG58/U coaxial network cable. To attenuate the radiated EMI that is generated by these currents and still preserve the low frequency safety isolation required by the IEEE Ethernet specification, most Cheapernet interface designs include one or more capacitors between the cable shield and the system chassis, as shown in Figure 50.

Since the shield conductor is connected to the -9V supply reference (power return or "ground"), any differential noise voltage appearing across the -9V supply will also appear as a common mode voltage between the cable shield and chassis. In other words, noise that may be present on the transceiver chip power rails will also appear as a common mode EMI problem on the Cheapernet cable shield. The transceiver power pins should therefore be filtered with capacitors and a series ferrite (Steward part number 25Z1806-OSO or 28L0138-xxx or 28C0236-OBW) to minimize noise associated with the switching activity of the transceiver as well as to decouple noise from other nearby devices that may couple on to the -9V supply PCB traces.

Cheapernet circuits may also create conducted EMI problems by driving 10MHz harmonics on to the -9V power conductors and back through the power supply to the host's AC power cord, also shown in Figure 50. In such cases, decoupling the - 9V supply with a ferrite component (Steward part number 25Z1806-OSO, 28L0138-xxx or 28C0236-OBW) and capacitors at the transceiver chip will help attenuate Ethernet related noise that may couple on to the host AC line.